BML FPGA Design Tutorial Part-10ofN

Placement and Floorplanning

2024.06.30 : I’m Kevin Hubbard, BSEE. I started my career 30+ years ago designing digital circuits on PCBs. I eventually moved into FPGAs in the mid-1990s and then onto designing digital ASICs for signal processing. I’m mostly back to FPGAs as they’ve become incredibly capable for signal processing and high speed interfacing. I’m writing this series ( which starts here ) to try and remove the shroud of secrecy surrounding FPGA development and hopefully encourage others to pursue a career in digital logic design. It’s been an incredibly challenging and rewarding career for me.

In Part-9 I introduced “Timing...

BML FPGA Design Tutorial Part-9ofN

Timing Closure

2024.06.29 : I’m Kevin Hubbard, Electrical Engineer for some 30+ years now.
At football tailgaters people will often ask me, “So what do you do for a living?”
My prepared answer is “I design digital computer chips.”
This generally shuts them up immediately.

Every so often though a smartass will reply “So you write RTL? You’re like a software engineer then?”
For which I reply, “No. I write RTL which infers digital CMOS logic gates that make timing across PVT – I’m an Electrical Engineer.” and then promptly throw my drink in their face. Now that REALLY shuts them up.

“Make Timing” aka “Timing Closure”...

BML FPGA Design Tutorial Part-8ofN

Finite State Machines (FSMs)

2024.06.22 : I’m Kevin Hubbard, Electrical Engineer. For 30+ years now companies have asked me to design digital logic circuits for them. Which I have, and get this – they even pay me for it. Don’t tell my boss, but I would absolutely do it for free. I started doing digital design in the early 1980’s as a kid. I got hooked designing small interface logic circuits for my 6502 and Z80 8bit computers of the era.
40+ years later, I’m still loving the challenge of digital logic design. It’s a lot like LEGO building, but getting...

BML FPGA Design Tutorial Part-7ofN

Verilog and VHDL Design Hierarchy.

2024.06.16 : I’m Kevin Hubbard, Electrical Engineer. I’ve spent the majority of my 30+ year career designing digital logic circuits in ASICs and FPGAs. It’s been an amazing journey that I hope others will pursue. I’m giving back now in writing this “Getting started with FPGAs” series which starts here.

In Part-6 I explained RTL simulations using the simulator that is included with AMD/Xilinx Vivado tool. In Part-7 I will explain Verilog and VHDL design hierarchy and then how I use my open-source IDE “ChipVault” for managing hierarchy for very large designs.

Unless you are designing a 22V10...

Cynthion Shipping Soon!

Note: This is a crosspost of a Cynthion update on Crowd Supply: https://www.crowdsupply.com/great-scott-gadgets/cynthion/updates/cynthion-shipping-soon

The first few Cynthions have come off of the manufacturing line! Once the first full batch of Cynthions is completed we will send them to Mouser who will ship them to you, our backers. Shipping will happen soon, so please make sure your address on Crowd Supply is up-to-date. If you need assistance with an address change please contact Crowd Supply. We will post another update once the first orders leave the Mouser warehouse. Until then, please enjoy these photos from our contract manufacturer.

Batch of Cynthions...

Запускаем .NET на RISC-V и разрабатываем IoT приложение для Sipeed Lichee RV

До недавнего времени разрабатывать IoT приложения на C# можно было только для компьютеров построенных на архитектуре ARM или x86. Поддержка RISC-V процессоров для платформы .NET уже давно в стадии разработки. В начале этого года был представлен не официальный .NET 8.0 SDK, который уже сейчас вы сможете запустить на RISC-V процессоре под ОС Debian/Ubuntu. В качестве платформы запуска возьмем одноплатный компьютер Sipeed Lichee RV на RISC-V процессоре Allwinner D1 (ядро Alibaba/T-Head Xuantie C906 RISC-V). В первой части поста рассмотрим установку .NET 8.0 SDK на Sipeed Lichee RV. Во второй, запустим приложение для работы с контактами GPIO и датчиком BME280 для замера...

E-ink digit clock

A clock made from four standalone modules where each module is an E-ink display plus controlling logic.

E-ink digit clock

A clock made from four standalone modules where each module is an E-ink display plus controlling logic.

E-ink digit clock

A clock made from four standalone modules where each module is an E-ink display plus controlling logic.

How an image led to an album

Curiosity takes you to new places. I arrived in such a place after contemplating what a highly complex polyrhythm might look like.

The post How an image led to an album appeared first on Music Hackspace.