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Portable Probability Panel
[Misc] Laser-cut Galton board
Простой приёмник прямого преобразования для любительской связи на 40, 80 м
Легендарная, можно сказать, схема однополосного приёмника за авторством Владимира Тимофеевича Полякова — превеликого популяризатора любительского радио и связной техники прямого преобразования, с которой нередко начинало свою работу в эфире целое поколение советского юношества. Лаконичная, простая в изготовлении и настройке, на ширпотребных элементах и с удовлетворительными параметрами. Собрана на тогдашней элементной базе и от оригинала [1] отличается модульным исполнением, более или менее напоминающим характерную конструкцию ВЧ приборов. Радио собрано с мелкими доработками, предложенными С. Э. Беленецким [2]. Читать дальше →
Inside an IBM/Motorola mainframe controller chip from 1981
In this article, I look inside a chip in the IBM 3274 Control Unit.1 But before I discuss the chip, I need to give some background on mainframes. (I didn't completely analyze the chip, so don't expect a nice narrative or solid conclusions.)
Die photo of the Motorola/IBM SC81150 chip. Click this image (or any other) for a larger version.IBM's vintage mainframes were extremely underpowered compared to modern computers; a System/370 mainframe ran well under 1 million instructions per second, while a modern laptop executes billions of instructions per second. But these mainframes could support rooms full of users, while my 2017 laptop can barely...
BML FPGA Design Tutorial Part-12ofN
RAMs and ROMs
2024.07.14 : I’m Kevin Hubbard, Electrical Engineer with a BSEE from University of Washington. Since early 1990s, 30+ years now, I’ve been been designing digital logic circuits for ASICs and FPGAs. I really love this job. It’s like building LEGOs but pushing electrons around instead of stacking colored plastic blocks together. In this series ( which starts here ) I hope to both educate and inspire others to pursue a rewarding career in digital logic design. If you want to pursue a career in LEGO building – that’s super cool too. I wish you prosperity.
I’ve done both, designed...
Вам подороже или побольше? Мониторинг воздуха: от элитных приборов до потребительских датчиков
Эта статья должна была быть о нашем исследовании данных между датчиком Nebo и эталонными датчиками мониторинга воздуха, проведённом при помощи доктора технических наук Ахим Диттлер. Однако ...
Читать далееBML FPGA Design Tutorial Part-11ofN
IO Banks
2024.07.07 : I’m Kevin Hubbard, Electrical Engineer. My EE specialty for 30+ years now has been designing digital logic circuits for ASICs and FPGAs. It has been a technically challenging and oftentimes fun (think LEGOs for grownups) career for me. In this series ( which starts here ) I hope to educate and inspire others to pursue a rewarding career in digital logic design.
In Part-10 I discussed FPGA floorplanning and explained how it differs so greatly from ASIC floorplanning. In Part-11, I will explain the wonders and mysteries of FPGA IO Banks. To fully understand why they are the...
Standard cells: Looking at individual gates in the Pentium processor
Intel released the powerful Pentium processor in 1993, a chip to "separate the really power-hungry folks from ordinary mortals." The original Pentium was followed by the Pentium Pro, the Pentium II, and others, spawning a long-running brand of high-performance processors, Intel's flagship line until the Core processors took over in 2006. The Pentium eventually became virtually synonymous with "PC" and even made it into pop culture.
Even though the Pentium is a complex chip with 3.3 million transistors, its transistors are visible under a microscope, unlike modern chips. By examining the chip, we can see the interesting circuits used for gates, flip-flops, and other circuits, including the use of an unusual...
Cynthion is at Mouser
Note: This is a crosspost of a Cynthion update on Crowd Supply: https://www.crowdsupply.com/great-scott-gadgets/cynthion/updates/cynthion-is-at-mouser
An 885 lb / 401.43 kg shipment of thousands of Cynthions has been received by Mouser (who will fulfill Cynthion orders for Crowd Supply)! We expect the Cynthions to start shipping to backers around the 5th of July. You will receive a notice when your Cynthion has shipped.
While you wait for your shipping notice and for your device to arrive, take a moment to read the Cynthion documentation. Cynthion does not ship with USB cables, so take a look at the connection diagrams in this documentation for different...
BML FPGA Design Tutorial Part-10ofN
Placement and Floorplanning
2024.06.30 : I’m Kevin Hubbard, BSEE. I started my career 30+ years ago designing digital circuits on PCBs. I eventually moved into FPGAs in the mid-1990s and then onto designing digital ASICs for signal processing. I’m mostly back to FPGAs as they’ve become incredibly capable for signal processing and high speed interfacing. I’m writing this series ( which starts here ) to try and remove the shroud of secrecy surrounding FPGA development and hopefully encourage others to pursue a career in digital logic design. It’s been an incredibly challenging and rewarding career for me.
In Part-9 I introduced “Timing...
BML FPGA Design Tutorial Part-9ofN
Timing Closure
2024.06.29 : I’m Kevin Hubbard, Electrical Engineer for some 30+ years now.
At football tailgaters people will often ask me, “So what do you do for a living?”
My prepared answer is “I design digital computer chips.”
This generally shuts them up immediately.
Every so often though a smartass will reply “So you write RTL? You’re like a software engineer then?”
For which I reply, “No. I write RTL which infers digital CMOS logic gates that make timing across PVT – I’m an Electrical Engineer.” and then promptly throw my drink in their face. Now that REALLY shuts them up.
“Make Timing” aka “Timing Closure”...